The invention relates to a semiconductor processing method, and more particularly to an improved method for processing a deep trench structure such as used as a storage capacitor of a dynamic random access memory.
In dynamic random access memories (DRAMs), as in all integrated circuits (ICs), there are ongoing efforts to reduce the size of all components. Components are required which occupy a smaller surface area of the IC. However, the use of smaller components can impact operability. For example, in the case of storage capacitors used in each memory cell of the DRAMs, reducing size can result in reduced storage capacitance of the memory cell, which, in turn, can adversely affect the functionality, and usability of the DRAM. The ratio of the storage capacitance to the bit line capacitance is critical in determining the signal level, since a ratio that is too small may be unable to produce the desired signal. DRAMs having smaller storage capacitance also require a higher refresh frequency. Increasingly, trench capacitors and other trench insulation structures are becoming the more attractive option in highly dense environments for the aforementioned reasons.
One type of storage capacitor used in DRAMs is the trench capacitor. A trench capacitor has a three-dimensional structure and is formed by etching into the silicon substrate. An increase in the capacitance of the trench capacitor can be achieved by etching deeper into the substrate. This is partly the reason for the popularity of this type of capacitor, because an increase in the capacitance of the trench capacitor enlarging the surface area occupied by the memory cell.
Furthermore, when surface flatness is desired, trench capacitors provide a suitable solution because their use does not affect planarity of features on or above the substrate surface. Nonetheless, the ever-increasing density of such environments still requires the size (diameter) of the trench openings to be reduced and is a factor that has to be considered when implementing trench capacitors or other trench isolation structures.
In fabricating trench capacitors (or any kind of trench isolation structure) it is a challenge to perform deep substrate etching at sufficiently small diameters to achieve the required component density. In fabricating trench structures, several layers of materials must be deposited within the trench. Since the trench diameter (opening) is very small, the deposited chemical layers can constrict the trench opening to the point in which subsequent chemical layers cannot be deposited effectively, if at all.
Even if the chemical layers are to be etched away later, the clogging of the opening adds difficulty to etching process and complexity to subsequent processes, and can ultimately impact device operability. In addition, once the trench opening is blocked or even when only a narrow opening remains, subsequent fabrication processes can become complicated and cost prohibitive.
Keeping trench diameters uniform across the substrate during fabrication runs is another challenge. Uniformity of trench diameter is desired to maintain sufficient storage capacitance in each memory cell. An improved fabrication method is sought for processing deep trenches in forming trench capacitors in such challenging environments. The present invention provides such an improved method.